Study of Shallow Trench Isolation Processes to Improve the Reliability on Flash Memory

• Main Authors: Ming-Feng Chang, 張明豐
• Other Authors: Chia-Feng Lin
• Format: Others
• Language: zh-TW
• Published: 2012
• Online Access: http://ndltd.ncl.edu.tw/handle/97625039631290119288

碩士 === 國立中興大學 === 材料科學與工程學系所 === 101 === Flash Memory Technology has been developed over 20 years, and advance 20nm node floating gate structural flash is main stream on non-volatile memory market. And it faces reliability failure on process critical dimension shrinkage, therefore, it is important to improve process to ensure the reliability performance. Many papers of process improvement on reliability respect already disclosed in semiconductor engineering journals, including plasma induce damage; hydrogen penetrate to influence tunnel oxide quality; mechanical stress; tunnel oxide integrity and etc. these improvement research is on going. The technology of this paper was to focus on 120nm NAND type flash process technology. To investigate tunnel oxide integrity and to use shallow trench isolation related processes to improve the reliability, the experiments included additional N2 treatment after shallow trench isolation liner HTO(high temp. oxidation) oxide deposition; shallow trench isolation liner HTO(high temp. oxidation) oxide thickness split and different shallow trench isolation high density plasma oxide(STI HDP oxide) deposition method. Base on these experiments to check 100k cycling erase threshold voltage(Vte) difference, the minor erase threshold voltage(Vte) push up after 100k cycling was to change shallow trench isolation oxide deposition method. It was improved from 3.08V to 2.35V and it can judge the correct data after 100k cycling.