Reliability Consideration with Rectangle - and Double - Signal Through Silicon Vias Insertion for 3D Thermal-Aware Floorplanning
碩士 === 國立臺灣科技大學 === 電子工程系 === 100 === Vertical integration of layers in a 3D IC exacerbates thermal problem especially for reliability degradation. Low reliability can not only damage the whole circuits but also occur unexpected performance loss. In this thesis, we conduct the SA engine with rectang...
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| Format: | Others |
| Language: | en_US |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/56730754121679659792 |