Transient IR-drop Analysis for At-speed Testing Using Representative Random Walk
碩士 === 國立臺灣大學 === 電子工程學研究所 === 100 === This thesis presents a representative random walk technique for fast transient IR-drop analysis. Representative random walk selects only a small number of nodes to model original network for simulation so that the memory and run time are significantly reduced....
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| Format: | Others |
| Language: | en_US |
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2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/08841501289029518339 |
| Summary: | 碩士 === 國立臺灣大學 === 電子工程學研究所 === 100 === This thesis presents a representative random walk technique for fast transient IR-drop analysis. Representative random walk selects only a small number of nodes to model original network for simulation so that the memory and run time are significantly reduced. Experimental results on large benchmark circuits show that our proposed technique can be up to 330 times faster than a commercial simulator while the average error is less than 10%. Furthermore, the exhaustive simulation of all 26K delay fault test patterns on a 400K-gate design can be finished within a week. The proposed technique is very useful to simulate capture cycles to identify test patterns that cause excessive IR drop during at-speed testing.
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