High-Quality Multi-Layer Obstacle-Avoiding Rectilinear Steiner Tree Construction
碩士 === 國立交通大學 === 資訊科學與工程研究所 === 100 === Single layer obstacles-avoiding rectilinear Steiner minimal tree (SL-OARSMT) has been generally applied to route nets. In modern VLSI designs, pins and obstacles, such as Intellectual Property (IP) blocks, macro blocks, power networks, pre-routed nets, etc ar...
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| Format: | Others |
| Language: | en_US |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/94301785257591284327 |