A low power digitally controlled oscillator based on interlaced hysteresis delay cells
碩士 === 國立交通大學 === 電機學院電子與光電學程 === 100 === As technology advances, portable devices become more and more popular. In portable devices, the power consumption becomes an important design issue. An all digital phase lock loop (ADPLL) has been widely used in frequency synthesizer and communication system...
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| Format: | Others |
| Language: | en_US |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/90348117689202908515 |