Evaluating the Performance of a Hybrid Interconnect in Many-Core Platform
碩士 === 國立成功大學 === 電腦與通信工程研究所 === 100 === Traditionally, a bus interconnect is used as the interconnect in a multi-core system due to its low transmission delay. However, it can only serve one master core at a time, and thus becomes a bottleneck when the number of cores increases in the system. There...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/06948496792344198418 |