A Synchronous Fast-Locked All-Digital Duty Cycle Corrector
碩士 === 長庚大學 === 電機工程學系 === 100 === The primary function of the duty cycle corrector(DCC) is to correct the duty cycle to 50% from unbalanced duty cycle. Many applications such as Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM), Double-Sampling Analog-to-Digital Converters(Dou...
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| Format: | Others |
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2012
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| Online Access: | http://ndltd.ncl.edu.tw/handle/54575679034355854436 |