Optimization Algorithm Applied to Zero Skew Clock Tree Implementation
碩士 === 淡江大學 === 電機工程學系碩士班 === 99 === In this paper in the system on chip design, we propose a method to determine a nonlinear branch connection location in the timing pulse wiring design that is 1) based on Fitted Elmore Delay model and it then combines 2) the evolution characteristics of the Partic...
Main Authors: | , |
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Other Authors: | |
Format: | Others |
Language: | zh-TW |
Published: |
2011
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Online Access: | http://ndltd.ncl.edu.tw/handle/22584086746554152375 |