Designing Self-timed Adders Using Low Power/Cost Differential Logic
碩士 === 南台科技大學 === 電子工程系 === 99 === Abstract We know that the global financial crisis of 2008 had gone through its worst period of time, and the semiconductor industry is getting recovered from the past year. How EDA and VLSI design engineers seize the moment of chances in the industry is the most c...
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| Format: | Others |
| Language: | zh-TW |
| Online Access: | http://ndltd.ncl.edu.tw/handle/98859762504894300582 |