High-speed Testing and Yield Enhancement Techniques for Content-addressable Memories
碩士 === 國立臺灣科技大學 === 電機工程系 === 99 === High-speed testing techniques and yield enhancement techniques for content-addressable memories are proposed in this thesis. According to the fault effects of the widely used fault models for CAM arrays, the fault models can be categorized into two types－serial t...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/9r7smy |