High-Speed Algorithms for Scatterometry Diagnosis and GPU-based Optical Lithography Simulation

碩士 === 國立臺灣大學 === 電子工程學研究所 === 99 === To ensure the quality of the nano-imprint fabricated optical gratings, optical scatterometry (OS) is an efficient and effective mean to diagnose the actual fabricated geometry. To facilitate the diagnosis process, efficient pattern matching algorithms over a hug...

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Bibliographic Details
Main Authors: Meng-chun Chiu, 邱盟竣
Other Authors: Chung-Ping Chen
Format: Others
Language:en_US
Published: 2010
Online Access:http://ndltd.ncl.edu.tw/handle/61313048320264765595
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Summary:碩士 === 國立臺灣大學 === 電子工程學研究所 === 99 === To ensure the quality of the nano-imprint fabricated optical gratings, optical scatterometry (OS) is an efficient and effective mean to diagnose the actual fabricated geometry. To facilitate the diagnosis process, efficient pattern matching algorithms over a huge database are of great importance. In my thesis, I will present an efficient algorithm to perform the least-square pattern matching in a huge simulated spectrum database. Equipped with singular value decomposition and hierarchical moment matching algorithm, the searching and diagnosis algorithm is extremely fast and accurate. It is over $3000 imes$ faster than a plain searching algorithm within 0.1\% accuracy. Optical micro-lithography image technology is a critical step in semiconductor manufacturing. As the VLSI manufacture technology develops, the feature size of micro-electronic devices shrinks smaller than the wavelength of exposure light source and challenges the limit of micro-lithography image system. Therefore, non-ideal effects in various processes of the stage of design and verification must be accurately taken into account and simulated to ensure a good yield of wafer and functional correctness. For this reason, high speed micro-lithography simulator is in strong demand for growing computational complexity to state-of-art resolution enhancement technology(RET) when handling modern industrial cases with millions of devices. In this work, we utilize parallel computing to speed up the image generation in micro-lithography simulation in order to provide more efficient optimization and verification.