An Application of Cluster-Based Design in 3D IC
碩士 === 國立彰化師範大學 === 資訊工程學系 === 99 === With the progress of Integrated Circuit (IC) fabrication, the amount of transistors in a IC is getting more and more. To reduce the metal layer the three-dimensional IC (3D IC) is developed to replace traditional IC (2D IC). In 3D IC, layer-to-layer uses Through...
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ndltd-TW-099NCUE53920202016-04-11T04:22:20Z http://ndltd.ncl.edu.tw/handle/46103837059707370212 An Application of Cluster-Based Design in 3D IC 應用於三維積體電路的叢集式設計 林家守 碩士 國立彰化師範大學 資訊工程學系 99 With the progress of Integrated Circuit (IC) fabrication, the amount of transistors in a IC is getting more and more. To reduce the metal layer the three-dimensional IC (3D IC) is developed to replace traditional IC (2D IC). In 3D IC, layer-to-layer uses Through-Silicon-Via (TSV) to transmission signal. At first we model the circuit as a hypergraph. Then we use the concept of cluster to produce initial cut. After initial cut, we build a Bucket structure to store node’s gain. To avoid all the nodes move to the same cluster, we set a formula to sure all of the area of the cluster are balance. In refined cut, we choose the node with highest gain from Bucket and move to appointed cluster. After refined cut, the initiative layers and the amount of TSVs will be decided. By sequential search, we choose the lowest amount of TSVs. Last, there are some formulas and variables to estimate the cost of 2D IC and 3D IC. The experimental results show the amount of TSVs that partition to two to five layers. Compare with the cost of 2D IC and 3D IC, the cost of 3D IC is cheaper with fewer nodes. Our algorithm is not complexity and hard. In future we will focus on research the algorithm that can process the circuit with more than ten thousand cells and we can obtain lower cost compare with 2D IC. 魏凱城 2011 學位論文 ; thesis 35 zh-TW |
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碩士 === 國立彰化師範大學 === 資訊工程學系 === 99 === With the progress of Integrated Circuit (IC) fabrication, the amount of transistors in a IC is getting more and more. To reduce the metal layer the three-dimensional IC (3D IC) is developed to replace traditional IC (2D IC). In 3D IC, layer-to-layer uses Through-Silicon-Via (TSV) to transmission signal.
At first we model the circuit as a hypergraph. Then we use the concept of cluster to produce initial cut. After initial cut, we build a Bucket structure to store node’s gain. To avoid all the nodes move to the same cluster, we set a formula to sure all of the area of the cluster are balance. In refined cut, we choose the node with highest gain from Bucket and move to appointed cluster. After refined cut, the initiative layers and the amount of TSVs will be decided. By sequential search, we choose the lowest amount of TSVs. Last, there are some formulas and variables to estimate the cost of 2D IC and 3D IC.
The experimental results show the amount of TSVs that partition to two to five layers. Compare with the cost of 2D IC and 3D IC, the cost of 3D IC is cheaper with fewer nodes. Our algorithm is not complexity and hard. In future we will focus on research the algorithm that can process the circuit with more than ten thousand cells and we can obtain lower cost compare with 2D IC.
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author2 |
魏凱城 |
author_facet |
魏凱城 林家守 |
author |
林家守 |
spellingShingle |
林家守 An Application of Cluster-Based Design in 3D IC |
author_sort |
林家守 |
title |
An Application of Cluster-Based Design in 3D IC |
title_short |
An Application of Cluster-Based Design in 3D IC |
title_full |
An Application of Cluster-Based Design in 3D IC |
title_fullStr |
An Application of Cluster-Based Design in 3D IC |
title_full_unstemmed |
An Application of Cluster-Based Design in 3D IC |
title_sort |
application of cluster-based design in 3d ic |
publishDate |
2011 |
url |
http://ndltd.ncl.edu.tw/handle/46103837059707370212 |
work_keys_str_mv |
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