Design Methodology for Yield Enhancement of Switched-Capacitor Analog Integrated Circuits
博士 === 國立中央大學 === 電機工程研究所 === 99 === As semiconductor technology continues to shrink, the process variation problems will become inevitable. It is anticipated that the problem of uncontrollable process variation will become more serious. As a result, yield loss caused by process variation is becomin...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/57014745892941669126 |