A novel design of decimation filter and corresponding compensation
碩士 === 國立交通大學 === 電控工程研究所 === 99 === In this thesis, we propose a novel design of decimation filter for ΣΔ ADC. The architecture of the proposed decimation filter includes two subfilters. The first subfilter is a modified CIC filter which can achieve better stopband rejection with lower hardware com...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/84824486272615800926 |