Turbo Decoder with Parallel Architecture and Contention-Free Interleaver

博士 === 國立交通大學 === 電子研究所 === 99 === This dissertation investigates the turbo decoders with parallel architecture and contention-free interleaver in pursuit of high throughput with reasonable cost. The benefits and disadvantages of conventional parallel schemes are examined; then the essential factors...

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Bibliographic Details
Main Authors: Wong, Cheng-Chi, 翁政吉
Other Authors: Chang, Hsie-Chia
Format: Others
Language:en_US
Published: 2010
Online Access:http://ndltd.ncl.edu.tw/handle/26347910110023998827