Study of high-k/III-V MOS devices

• Main Authors: Lin, Ting-Chun, 林鼎鈞
• Other Authors: Chang, Yi
• Format: Others
• Language: en_US
• Published: 2010
• Online Access: http://ndltd.ncl.edu.tw/handle/01397521585270486842

碩士 === 國立交通大學 === 材料科學與工程學系 === 99 === III-V semiconductor material has been researched and considered as the alternative channel material to silicon for complementary Metal-Oxide-Semiconductor (CMOS) applications beyond the 22nm node due to its superior properties. High-k dielectric was introduced as gate dielectrics for III-V material Metal-Oxide-Semiconductor (MOS) structure, because it can maintain the equivalent oxide thickness with thicker physical thickness resulting in the leakage current reduction and the capacitance improvement. In this study, HfO2 and CeO2 were used as gate oxides on InGaAs MOS capacitors; the both oxides have the larger dielectric constant than Al2O3 which is commonly used as gate oxide for III-V materials. HfO2/InAs MOS capacitors with varied Post Deposition Annealing (PDA) temperatures were demonstrated for the first in this study; low interface trap density and hysteresis were obtained which implies excellent interface quality. CeO2/HfO2 gate stack structure was introduced as gate dielectrics for InGaAs MOSFET; the design of the stack structure can improve the capacitance meanwhile prevent the diffusion between the oxide and the semiconductor. The MOSFET with CeO2/HfO2 gate oxide was also fabricated and the measurement results are discussed.