An Enhancing Reliability Method for Multilevel Flash Memory by Using Interleaving Arrangement

碩士 === 國立中興大學 === 資訊科學與工程學系所 === 99 === In this work, we propose a new interleaving arrangement to average the temporary error bits caused by dichotomic serial sensing architecture in multilevel flash. Furthermore, the proposed arrangement also can effectively enhance the reliability (MTBF) of multi...

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Main Authors: Tzung-Han Yeh, 葉宗翰
Other Authors: Der-Chen Huang
Format: Others
Language:zh-TW
Published: 2011
Online Access:http://ndltd.ncl.edu.tw/handle/44622038307594636418
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spelling ndltd-TW-099NCHU53940352017-10-29T04:34:05Z http://ndltd.ncl.edu.tw/handle/44622038307594636418 An Enhancing Reliability Method for Multilevel Flash Memory by Using Interleaving Arrangement 一種使用交錯式排列提升多值快閃記憶體可靠度的方法 Tzung-Han Yeh 葉宗翰 碩士 國立中興大學 資訊科學與工程學系所 99 In this work, we propose a new interleaving arrangement to average the temporary error bits caused by dichotomic serial sensing architecture in multilevel flash. Furthermore, the proposed arrangement also can effectively enhance the reliability (MTBF) of multilevel flash. In our experiment results, interleaving arrangement can provide low error bits rate then only using bit-layer arrangement. And use simple switch circuits realization interleaving arrangement. In bit-layer method, using dichotomic serial sensing output stage will create cell spare part lengths uneven demand. Der-Chen Huang 黃德成 2011 學位論文 ; thesis 36 zh-TW
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description 碩士 === 國立中興大學 === 資訊科學與工程學系所 === 99 === In this work, we propose a new interleaving arrangement to average the temporary error bits caused by dichotomic serial sensing architecture in multilevel flash. Furthermore, the proposed arrangement also can effectively enhance the reliability (MTBF) of multilevel flash. In our experiment results, interleaving arrangement can provide low error bits rate then only using bit-layer arrangement. And use simple switch circuits realization interleaving arrangement. In bit-layer method, using dichotomic serial sensing output stage will create cell spare part lengths uneven demand.
author2 Der-Chen Huang
author_facet Der-Chen Huang
Tzung-Han Yeh
葉宗翰
author Tzung-Han Yeh
葉宗翰
spellingShingle Tzung-Han Yeh
葉宗翰
An Enhancing Reliability Method for Multilevel Flash Memory by Using Interleaving Arrangement
author_sort Tzung-Han Yeh
title An Enhancing Reliability Method for Multilevel Flash Memory by Using Interleaving Arrangement
title_short An Enhancing Reliability Method for Multilevel Flash Memory by Using Interleaving Arrangement
title_full An Enhancing Reliability Method for Multilevel Flash Memory by Using Interleaving Arrangement
title_fullStr An Enhancing Reliability Method for Multilevel Flash Memory by Using Interleaving Arrangement
title_full_unstemmed An Enhancing Reliability Method for Multilevel Flash Memory by Using Interleaving Arrangement
title_sort enhancing reliability method for multilevel flash memory by using interleaving arrangement
publishDate 2011
url http://ndltd.ncl.edu.tw/handle/44622038307594636418
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