Thermal Analysis and Design of 3D IC Packaging
碩士 === 逢甲大學 === 航太與系統工程所 === 99 === Because of greatly-increased function density and significant-ly-reduced package profile and interconnect length, thereby leading to drastically-enhanced electrical performance, three-dimensional (3D) chip stacking technology with micro-bump or/and through-silicon...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/09789623359329127516 |