SCR-Incorporated BJT Circuits with an NMOS Switch for Robust ESD Protection in CMOS Technology
碩士 === 清雲科技大學 === 電子工程所 === 99 === In 0.18μm CMOS process, A traditional SCR is easily susceptible into latch-up and leads to circuit fail for electrostatic discharge (ESD) protection, it is due to very low DC holding voltage performance of the SCR. Therefore, this work first developed a new SCR-inc...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/17504461161775575972 |