6-bit 1G sample/s CMOS flash analogue-to-digital converter
碩士 === 建國科技大學 === 電子工程系暨研究所 === 99 === We present a 6-bit 1G sample/s CMOS flash analogue-to-digital converter (ADC) with new design concepts. First, we use a three input AND gate in sample and holding(S/H) structure to replace the conventional resistor and capacitor one that improves the dimensiona...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/42342328846032837908 |