| Summary: | 碩士 === 中華大學 === 機械工程學系碩士班 === 99 === Solder joint reliability is of great concern to semiconductor and electronic product manufacturers. Due to rapid advancements in the electronic industry, packages with fine pitch ball grid array have been increasingly used in portable electronic devices. The mechanical shock resulting from mishandling during transportation or custom usage may lead to malfunction of product. A Joint Electron Device Engineering Council (JEDEC) standard (JESD22-B111) for a board-level drop test of handheld electronic products was released to specify the drop test procedure and conditions in 2003.
This purpose of this thesis is to investigate the drop test of a specific CMOS image sensor. The topic consists of experiment and finite element simulation through JEDEC Condition B. In experiment, the dynamic behaviors of impact acceleration, strain and resistance are measured. Input-D, supported excitation, and input G are performed in numerical simulation. The correlation between experiment and simulation are compared.
One selects two types of specimen under investigation. One chip on board center does not fail until 150 drops and fifteen chips on board fails at the corner ship after 60 drops and at the center chip after 111 drops.
The comparison of strain along the long side at the bottom of the board between experiment and simulation is well correlated at certain levels for input-D and supported excitation. However, the difference between experiment and input-G should be further studied.
The completeness of this study will be performed with CMOS image sensor and investigated the drop dynamic behaviors. Through the exploring process of the analysis, the knowledge and technology are developed to further study the related topics.
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