The Investigation of Drain Current Variation in Strained CMOS Devices

• Main Authors: CHUANG CHIEN HUNG, 莊建宏
• Other Authors: J. C. Wang
• Format: Others
• Published: 2011
• Online Access: http://ndltd.ncl.edu.tw/handle/88621290809191557807

碩士 === 長庚大學 === 電子工程學系 === 99 === In this thesis, a statistical multivariate analysis (multivariate analysis) method has been employed to study the drain current and threshold voltage fluctuation and variation in strained CMOS devices. The variations are caused by the strain-induced effect and the carrier transport. It was found that the linear Id variation is dominated by the carrier mobility scattering; while in saturation region, the drain current variation is dominated by the injection velocity. The higher the injection velocity is, the smaller the drain current variation is. For the threshold voltage (Vth) variation, the threshold voltage of the linear region is dominated by the random dopant fluctuation. The threshold voltage variation is dominated by the short channel effect, when it is in the saturation region. Moreover, there is another important transport parameter, Bsat, the transport efficiency, which keeps the variation much worse because the Carbon or Germanium impurities will be out-diffused from the source and drain. Those results provide a guideline for achieving good control of variability for strain-based CMOS technologies.