| Summary: | 碩士 === 國立中正大學 === 機械工程學系暨研究所 === 99 === In recent years, multi-layer chip-stacking and reduce the size of chip have become important technology for three dimensional chip stacking packages. Through-silicon-via (TSV) is the most important technology for chip-stacking at present. Filled metal connect each chip, the sorts and proportion of filled metal are important indexes for detecting the TSV structure. In this study ,a method coupled Finite element and infinite element methods has been developed to analyzed the thermal stress distribution of TSV structures; and investigated types, proportion of the metal layers, and the size effect of internal void of the filled in metals.
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