A Snoop2-NUCA Substrate with Ring Interconnection for Flexible Multicore L1 Cache Sharing
碩士 === 國立中正大學 === 資訊工程研究所 === 99 === Today’s multicore (or manycore) systems face memory-intensive and communication-intensive challenges to limit its scalability. Traffic on DRAM accessing or tradition shared caches (L2/L3) dominates real-time performance and power envelope. Distributing the traffi...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/40327408861807513816 |