BTS: Braided Timing Speculation for Ultra-Low Voltage Processors
碩士 === 國立中正大學 === 資訊工程研究所 === 99 === Traditional designs adopt conservative approaches that consider worst-case combinations of process, voltage, temperature, and data variations and design-time inaccuracies to guarantee their functional correctness throughout all operating situations. Performance,...
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| Format: | Others |
| Language: | en_US |
| Published: |
2011
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| Online Access: | http://ndltd.ncl.edu.tw/handle/77954793782720222571 |