ALL DIGITAL PHASE-LOCKED LOOP WITH HIGH RESOLUTION DIGITAL CONTROLLED OSCILLATOR
碩士 === 大同大學 === 通訊工程研究所 === 98 === In this thesis, we implement an all digital phase locked loop (ADPLL) with high resolution digital controlled oscillator. We use time to digital converter to quantize phase error and use a high resolution ring oscillator to be the digital controlled oscillator in t...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/03532117016625588613 |