| Summary: | 碩士 === 臺灣大學 === 電子工程學研究所 === 98 === In this thesis, the first chapter is to research the EUV effect on HBTs, the device under test is a test-key made by TSMC, and irradiated with EUV at NSRRC. The DC measurement is conducted at NTU, and the AC S-parameter is measured at NDL. The results show the EUV will introduce traps in emitter-base and base-collector depletion region. The traps will enhance the generation current of base current to degrade the DC performance. The traps will delay the onset of Kirk effect to increase the frequency of unity current gain. The second part is to develop the physical mechanism of resistive random access memory (RRAM). The model interpret the forming mechanism, low resistance state (LRS) conduction, high resistance (HRS) conduction, state switching, cycling fluctuation, and multi-level operation well. However, the model cannot interpret the current density induced high temperature under LRS, and the low resistance value versus temperature measurement. Maybe the introduction of ballistic theory can interpret the phenomenon well. In the third chapter, the SPICE model development by ELDO of phase change memory (PCRAM) is developed based on previous reports. The structure with falling edge problem solved and crystallization time calibrated. The I-V and R-I curve are fit well and the cell temperature and crystallization fraction is well calculated.
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