Functional Verification Environment for Universal Serial Bus 3.0
碩士 === 臺灣大學 === 電子工程學研究所 === 98 === The complexity of digital electronic circuit is growing dramatically these years, making verification process, which is considered the major bottleneck, more challenging. Moreover, the rapid renew of various technologies is forcing IC industry to shorten the tim...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/66200702898036751727 |