Simultaneous Gate Sizing and Multiple-Vt Assignment for Cell-Based Design
碩士 === 臺灣大學 === 電子工程學研究所 === 98 === Circuit optimization is a very important step in high performance and low power IC design. It has a significant impact on the delay, power dissipation and area of the final circuit. Gate sizing and multiple-Vt assignment are common and useful ways to meet power an...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/35301614768066160477 |