Column Level Binning of CMOS Image Sensor for Low-Light Imaging
碩士 === 國立臺北大學 === 電機工程研究所 === 98 === This work presents a column level binning circuit for a CMOS image sensor for the purpose of low-light imaging. A 2 x 2 kernel pixel binning (averaging) is employed in this design reducing the spatial resolution to 1/4 of the original size and every two columns o...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Online Access: | http://ndltd.ncl.edu.tw/handle/40376475932037728638 |