The study of charge trap flash memory device with band engineered trapping layer
碩士 === 國立清華大學 === 工程與系統科學系 === 98 === 1.Improvement of P/E speed for NAN structure trapping layer higher charge tunneling efficiency lower Ig 2.Trapped charge detrap easier for HfO2 compared with Si3N4,but that’s a trade-off : erasing speed ? retention 3.Improvement of endurance characterist...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/47291991120299568898 |