3×VDD Bidirectional Mixed-Voltage-Tolerant I/O Buffer and 2×VDD Output Buffer with Process and Temperature Compensation
碩士 === 國立中山大學 === 電機工程學系研究所 === 98 === This thesis is composed of two parts : a 3×VDD bidirectional mixed-voltage-tolerant I/O buffer, and a 2×VDD output buffer with process and temperature compensation. In the first topic, a 3×VDD bidirectional mixed-voltage-tolerant I/O buffer, which is able to to...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/44764539677741756222 |