Design of Systolic Arrays for Tolerating Timing Errors
碩士 === 國立東華大學 === 電子工程研究所 === 98 === With the rapid progress of semiconductor process in recent years, we have been able to put more than hundreds of millions transistors into a single chip. The circuit characteristics in a large-scale chip have therefore changed significantly, while the transistor...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/92573152136184293323 |