Asynchronous Fine-grain Power-gated Logic
碩士 === 國立彰化師範大學 === 電子工程學系 === 98 === This thesis proposed a novel low-power logic circuit, called Asynchronous Fine-grain Power-gated Logic (AFPL). The AFPL logics adopt dual-rail encoding, and employ handshaking to transfer data between the adjacent modules. AFPL has the advantages of asynchronous...
| Main Authors: | , |
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/64722803426243802979 |