Design and Implementation of 5-Gb/s Inductorless Analog Equalizer for PCI Express Generation II
碩士 === 國立中央大學 === 電機工程研究所 === 98 === In recent years, due to rapid development of network and processor, transmit a lot of data quickly becomes the main motivation of transmission system. Therefore, conventional parallel bus is replaced gradually by high-speed serial link transmission system. But, w...
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| Format: | Others |
| Language: | zh-TW |
| Online Access: | http://ndltd.ncl.edu.tw/handle/15118907572706159586 |