| Summary: | 博士 === 國立交通大學 === 材料科學與工程學系 === 98 === High performance InAs-channel high electron mobility transistors (HEMTs) have been fabricated and characterized for high frequency and high speed logic low-power consumption applications. The performance of the InAs-channel HEMTs was improved by optimizing the device structure and using a sub-micron gate. The epi-structure, layout design and electrical measurements of the devices are discussed in details in this dissertation.
In this study, a 70-nm In0.52Al0.48As/In0.6Ga0.4As power MHEMT with double δ-doping was fabricated and evaluated. The device has a high transconductance of 827 mS/mm. The saturated drain-source current of the device is 890 mA/mm. A current gain cutoff frequency (fT) of 200 GHz and a maximum oscillation frequency (fmax) of 300 GHz were achieved due to the nanometer gate length used and the high Indium content in the channel. When measured at 32 GHz, the 0.07 × 160 μm¬2 device demonstrates maximum output power of 14.5 dBm (176 mW/mm) and P1dB of 11.1 dBm (80 mW/mm) with 9.5 dB power gain. The excellent DC and RF performance of the 70-nm MHEMT shows a great potential for Ka-band power applications.
In order to further enhance the performance, the indium content of the InxGa1-xAs channel was increased to 100 % to form an InAs-channel HEMT. A high current gain cutoff frequency (ft) of 310 GHz and a high maximum oscillation frequency (fmax) of 330 GHz were obtained at VDS = 0.7 V due to the high electron mobility in the InAs channel. Performance degradation was observed on the cutoff frequency (ft) and the corresponding gate delay time for logic applications caused by impact ionization due to a low energy bandgap in the InAs channel. DC and RF characterizations on the device have been performed to determine the proper bias conditions in avoidance of the performance degradations due to the impact ionization. With the design of InGaAs/InAs/InGaAs composite channel, the impact ionization was not observed until the drain bias reached 0.7 volt, and at this bias the device demonstrated very low gate delay time of 0.63 psec. The high performance of the InAs/InGaAs HEMTs demonstrated in this study shows its great potential for high speed and very low power logic applications.
In the issue of power consumption, InAs-channel HEMT for ultralow-power low-noise amplifier (LNA) applications has been characterized. Small-signal S-parameter measurements performed on the InAs-channel HEMT at a low drain-source voltage of 0.2 V exhibited an excellent fT of 120 GHz and an fmax of 157 GHz. At an extremely low level of dc power consumption of 1.2 mW, the device demonstrated an associated gain of 9.7 dB with a noise figure of less than 0.8 dB at 12 GHz. Such a device also demonstrated a higher associated gain and a lower noise figure than other InGaAs-channel HEMTs at extremely low dc power consumption. These results indicate the outstanding potential of InAs-channel HEMT technology for ultralow-power space-based radar, mobile millimeter-wave communications and handheld imager applications.
In search of an alternative device for beyond Si-CMOS, n-type metal-oxide-semiconductor HEMT (MOS-HEMT) devices with an InAs-channel using atomic-layer-deposited Al2O3 as gate dielectric have been fabricated and characterized. Device performance of a set of scaled transistors with and without high-k gate dielectric Al2O3 have been compared to determine the optimum device structure for low-power and high-speed applications. Measurement results revealed that the high-performance InAs-channel MOS-HEMTs with ALD Al2O3 gate dielectric can be achieved if the structure is designed properly.
|
|---|
