| Summary: | 碩士 === 國立成功大學 === 機械工程學系碩博士班 === 98 === Microsystem devices are composed of multi-layered thin films with different material properties and structural thickness, and are connected with each other via metallic interconnect structures. However, during fabrication, the therm-mechanical mismatch between materials generates high stresses, which cause the generation of stress-induced voiding, cracks, as well as the possible channel cracks and interface delaminations. These defects strongly affect the reliability of integrated circuit devices. As a result, the reliability of thin films and interconnect structures becomes one major concern of modern microelectronics. The aim of this study is to address the reliability of interconnect structures and thin films through a systematic failure analysis, and to provide effective methods to improve the reliability of IC and MEMS devices. This theses utilizes mechanics of materials, fracture mechanics, and finite element method to analysis channel cracking and interfacial delamination of thin films and interconnect structures, as well as for estimating that the stress and energy release rate within the structures. Parametric studies for investigating the sensitivity of each physical parameter on the stress generation, strain energy release rate, and crack growth are presented. The results show that high stress could generate stress-induced voiding and cracking, and select the low-k materials that lower Young's modulus and coefficient of thermal expansion could avoid cause high stress. Lower processing temperature could improve the reliability of interconnect structures, and a smaller residual stress could avoid interfacial delamination of thin films. Using this systematic failure analysis method, it is possible to provide an efficient method to analysis fracture problems, and the study results should be useful for providing engineers the the conceptual design structure reliability access of thin film and interconnect structures, and to reduce development time.
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