Advanced Layout Technology Considering Reliability and Process Variation
碩士 === 輔仁大學 === 電子工程學系 === 98 === The device size has been developed from deep sub-micron to nanometer generation accompanying with the evolution of semi-conductor process technology in order to improve the performance of the integrated circuit, operation speed and the cost. However, there are probl...
Main Authors: | Chieh-Ming Yang, 楊捷名 |
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Other Authors: | Kuan-Jen Lin |
Format: | Others |
Language: | zh-TW |
Published: |
2010
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Online Access: | http://ndltd.ncl.edu.tw/handle/10318104520226733186 |
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