Testing Methods for the Data Retention Time of Deep Trench DRAM and Related Parameters Setting
碩士 === 中原大學 === 電子工程研究所 === 98 === Two testing methods are used simultaneously to analyze the retention time of deep trench DRAM. Both the gate and base voltages were modulated to find proper testing conditions for the failure analysis. Proper testing conditions will provide useful messages to minim...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/58771322528855613367 |