Redundant Via Insertion with Wire Shifting for Yield Improvement
碩士 === 中華大學 === 資訊工程學系碩士班 === 98 === According to the development curve in Moore’s law, the number of transistors is increased doubly every eighteen months. With the increase of design complexity in the fixed area of entire IC, the quality of IC manufacture is decreased. Furthermore, designers have...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2010
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| Online Access: | http://ndltd.ncl.edu.tw/handle/47814207842829061912 |