Design and Simulation of Schottky Barrier Flash Memory

• Main Authors: Yan-Xiang Luo, 羅彥翔
• Other Authors: 施君興
• Format: Others
• Language: zh-TW
• Published: 2009
• Online Access: http://ndltd.ncl.edu.tw/handle/97333038717092396795

碩士 === 元智大學 === 電機工程學系 === 97 === The standard floating gate Flash cells is the mainstream nonvolatile semiconductor memory. The challenges to future scaling are imposed by the non-scalable tunneling oxide and high voltage to provide sufficient drain-side hot electron injections. This study uses two-dimensional device simulator to present a novel Schottky barrier source/drain Flash memory cell with promising source-side hot electron injection. Rather than conventional cell, the unique Schottky barrier formed at source/channel interface significantly promotes the amount of source-side hot electrons to provide high injection efficiency at considerably low voltages without compromising between gate and drain biases. An optimal design of Schottky Barrier Flash cell is achieved using the dopant segregation layer, silicon-on-insulator substrate and dual workfunction gate with enhanced gate current.