Fabrication and characteristic study of silicon tip arrays for electron beam lithography
博士 === 國立臺灣大學 === 機械工程學研究所 === 97 === This dissertation discusses the fabrication of sharp n-type silicon tip arrays for the e-beam source to be used in a massively parallel direct-write electron-beam system. The sharp silicon tip array is essential to produce high emission current. The fabrication...
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ndltd-TW-097NTU054890932016-05-04T04:31:49Z http://ndltd.ncl.edu.tw/handle/20310569783300333997 Fabrication and characteristic study of silicon tip arrays for electron beam lithography 電子束微影矽針陣列之製作與特性研究 Wei-Li Chuang 莊偉立 博士 國立臺灣大學 機械工程學研究所 97 This dissertation discusses the fabrication of sharp n-type silicon tip arrays for the e-beam source to be used in a massively parallel direct-write electron-beam system. The sharp silicon tip array is essential to produce high emission current. The fabrication procedure used in this dissertation does not require the conventional thermal oxidation sharpening process. Instead, this study looks into various possibilities and proposes a new sharpening process using only controlled reactive-ion etching (RIB) system. This process is then performed repeatedly until the mask falls. The interval of RIE etching time is kept under 1 min to avoid over-etching of the silicon tips. Basically, the underlining tip-formation process is still based on dry-plasma etching, but a combination of dry etching and wet KOH etching reduces the time required for dry-etching. The designed distance between adjacent tips is 40 ~ 100 um. Our experimental results show that such combination does effectively reduce the dry-etching time. It is also observed that the tip radius achieved is about 30 nm or less, and the tip height can be increased. To reduce threshold voltage, we also fabricate gated field emission array. Our proposed method is simple and reliable, and it can produce the sharp silicon tip and metal gate in the same procedure. The field emission experiments are carried out to measure the performance of our vacuum device. The I-V characteristic of our field emission array agrees with Fowler-Nordheim theory. The measured emission current is several nano-ampere from one single tip and several hundreds of nano-ampere from a 4×4 tip array. This current is higher than the required current for high wafer etching throughput (10 wafers/hour) requirement. Jia-Yush Yen 顏家鈺 2009 學位論文 ; thesis 167 en_US |
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博士 === 國立臺灣大學 === 機械工程學研究所 === 97 === This dissertation discusses the fabrication of sharp n-type silicon tip arrays for the e-beam source to be used in a massively parallel direct-write electron-beam system. The sharp silicon tip array is essential to produce high emission current. The fabrication procedure used in this dissertation does not require the conventional thermal oxidation sharpening process. Instead, this study looks into various possibilities and proposes a new sharpening process using only controlled reactive-ion etching (RIB) system. This process is then performed repeatedly until the mask falls. The interval of RIE etching time is kept under 1 min to avoid over-etching of the silicon tips. Basically, the underlining tip-formation process is still based on dry-plasma etching, but a combination of dry etching and wet KOH etching reduces the time required for dry-etching. The designed distance between adjacent tips is 40 ~ 100 um. Our experimental results show that such combination does effectively reduce the dry-etching time. It is also observed that the tip radius achieved is about 30 nm or less, and the tip height can be increased. To reduce threshold voltage, we also fabricate gated field emission array. Our proposed method is simple and reliable, and it can produce the sharp silicon tip and metal gate in the same procedure. The field emission experiments are carried out to measure the performance of our vacuum device. The I-V characteristic of our field emission array agrees with Fowler-Nordheim theory. The measured emission current is several nano-ampere from one single tip and several hundreds of nano-ampere from a 4×4 tip array. This current is higher than the required current for high wafer etching throughput (10 wafers/hour) requirement.
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Jia-Yush Yen |
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Jia-Yush Yen Wei-Li Chuang 莊偉立 |
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Wei-Li Chuang 莊偉立 |
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Wei-Li Chuang 莊偉立 Fabrication and characteristic study of silicon tip arrays for electron beam lithography |
author_sort |
Wei-Li Chuang |
title |
Fabrication and characteristic study of silicon tip arrays for electron beam lithography |
title_short |
Fabrication and characteristic study of silicon tip arrays for electron beam lithography |
title_full |
Fabrication and characteristic study of silicon tip arrays for electron beam lithography |
title_fullStr |
Fabrication and characteristic study of silicon tip arrays for electron beam lithography |
title_full_unstemmed |
Fabrication and characteristic study of silicon tip arrays for electron beam lithography |
title_sort |
fabrication and characteristic study of silicon tip arrays for electron beam lithography |
publishDate |
2009 |
url |
http://ndltd.ncl.edu.tw/handle/20310569783300333997 |
work_keys_str_mv |
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