Research on the Testability of Quantum Boolean Circuits

博士 === 國立臺灣大學 === 電機工程學研究所 === 97 === Circuit testing is now over 45 years and poses many considerable challenges. The circuits of modern electrical appliances become more and more complicated and the cost of circuit testing is rapidly increasing along with the complexity of the chip. According to I...

Full description

Bibliographic Details
Main Authors: Yao-Hsin Chou, 周耀新
Other Authors: 郭斯彥
Format: Others
Language:en_US
Published: 2009
Online Access:http://ndltd.ncl.edu.tw/handle/09789931876530670157
id ndltd-TW-097NTU05442004
record_format oai_dc
collection NDLTD
language en_US
format Others
sources NDLTD
description 博士 === 國立臺灣大學 === 電機工程學研究所 === 97 === Circuit testing is now over 45 years and poses many considerable challenges. The circuits of modern electrical appliances become more and more complicated and the cost of circuit testing is rapidly increasing along with the complexity of the chip. According to Inter/National Technology Roadmap for Semiconductors 2001/1997, test cost will become critical part of the total cost in ten years. It is indispensable to control these costs and provide a cost-effective solution. Therefore, it is important to develop efficient testing approaches. Testing is also the key to many fault tolerance approaches that improve product reliability. Nowadays, every electronic device/electrical appliance we use is built by Boolean circuits. In this project, a novel method is proposed to perform logic testing for Boolean circuit by utilizing the quantum computation. In the future, any Boolean circuit can be tested easily, quickly, and cost-effectively, so that reliable and inexpensive products can be acquired by everyone. It has been proved that any Boolean circuit can have its quantum version. In this project, we showed that quantum Boolean circuits can be arranged into a 1-testable quantum iterative logic array (QILA). Furthermore, with superposition, which is a nanoscale phenomenon in the quantum computation, any quantum Boolean circuit and any QILA can be tested in just a few steps for any given classical Boolean function. By utilizing nanotechnology, these methods provide a smooth migration to the next generation circuit design and may intrinsically change the IC design flow in the future. Recently, a systematic procedure was proposed to derive a minimum input quantum circuit for any given classical logic with the generalized quantum Toffoli gate, which is universal in Boolean logic. Since quantum Boolean circuits are reversible, we can apply this property to build quantum iterative logic array (QILA). QILA can be easily tested in constant time (C-testable) if stuck-at fault model is assumed. In this project, we try to use Hadamard and general CCN gates to make QILA 1-testable. That is, for any quantum Boolean circuit, the number of test patterns is independent of both the size of the array and the length of the inputs. Nanotechnology has made the semiconductor industry to keep up with the growth of consumers'' performance--capacity demands. Sophisticated semiconductor fabrication techniques are used for the production of nanoscale structures. By nanometer technologies, there are more transistors fabricated on a single chip with increasing integration scale, thus reducing the cost per transistor. However, nanometer-scale devices have much higher manufacturing fault rates and are more sensitive to failures of transistors and wires owing to many external factors. Consequently, the difficulty of testing each transistor increases as the complexity of devices increases. Testing such highly complex and dense circuits becomes very difficult and expensive. On the other hand, when devices are getting smaller and smaller, the quantum effect appears. With nanoscale phenomenon such as superposition or entanglement, we can perform quantum computation to accomplish some tasks that are classically impossible. Some of these examples are Shor''s factorization and Grover''s search algorithm. It is interesting to note that these nano-phenomena can be used to solve the circuit testing problem as well. Previous study showed that any classical circuit can be implemented by a straightforward replacement algorithm with auxiliary qubits as intermediate storage. Recently, a construction procedure of minimum input quantum Boolean circuit was proposed. The constructed quantum Boolean circuits are reversible. Such circuits are of interest for several reasons. One of the important reasons is energy saving. Reversible circuits are information lossless and hence tend to dissipate relatively little energy. According to Landauer''s principle, it is possible to construct a computer using reversible circuits that can compute with arbitrarily small amounts of energy. Another reversible circuit''s property of particular interest is that the Boolean function of a reversible circuit is bijective (one-to-one and onto); hence it can be used to form an iterative logic array (ILA), a system that consists of identical modules arranged in a geometrically regular interconnection pattern. ILA is well known to be easily testable. In this project, we study the testing properties on quantum Boolean circuit and quantum iterative logic array (QILA). QILA consists of reversible quantum circuits constructed from a library of universal reversible gates, including quantum NOT, controlled-NOT (CNOT), generalized controlled-controlled-NOT (CCN), and Hadamard gates. Under stuck-at fault and cell fault model, we show that any QILA and quantum Boolean circuits are 1-testable. That is, the circuits can be tested with only one test pattern.
author2 郭斯彥
author_facet 郭斯彥
Yao-Hsin Chou
周耀新
author Yao-Hsin Chou
周耀新
spellingShingle Yao-Hsin Chou
周耀新
Research on the Testability of Quantum Boolean Circuits
author_sort Yao-Hsin Chou
title Research on the Testability of Quantum Boolean Circuits
title_short Research on the Testability of Quantum Boolean Circuits
title_full Research on the Testability of Quantum Boolean Circuits
title_fullStr Research on the Testability of Quantum Boolean Circuits
title_full_unstemmed Research on the Testability of Quantum Boolean Circuits
title_sort research on the testability of quantum boolean circuits
publishDate 2009
url http://ndltd.ncl.edu.tw/handle/09789931876530670157
work_keys_str_mv AT yaohsinchou researchonthetestabilityofquantumbooleancircuits
AT zhōuyàoxīn researchonthetestabilityofquantumbooleancircuits
AT yaohsinchou liàngzibùlíndiànlùkěcèshìxìngzhīyánjiū
AT zhōuyàoxīn liàngzibùlíndiànlùkěcèshìxìngzhīyánjiū
_version_ 1718263772019163136
spelling ndltd-TW-097NTU054420042016-05-09T04:14:01Z http://ndltd.ncl.edu.tw/handle/09789931876530670157 Research on the Testability of Quantum Boolean Circuits 量子布林電路可測試性之研究 Yao-Hsin Chou 周耀新 博士 國立臺灣大學 電機工程學研究所 97 Circuit testing is now over 45 years and poses many considerable challenges. The circuits of modern electrical appliances become more and more complicated and the cost of circuit testing is rapidly increasing along with the complexity of the chip. According to Inter/National Technology Roadmap for Semiconductors 2001/1997, test cost will become critical part of the total cost in ten years. It is indispensable to control these costs and provide a cost-effective solution. Therefore, it is important to develop efficient testing approaches. Testing is also the key to many fault tolerance approaches that improve product reliability. Nowadays, every electronic device/electrical appliance we use is built by Boolean circuits. In this project, a novel method is proposed to perform logic testing for Boolean circuit by utilizing the quantum computation. In the future, any Boolean circuit can be tested easily, quickly, and cost-effectively, so that reliable and inexpensive products can be acquired by everyone. It has been proved that any Boolean circuit can have its quantum version. In this project, we showed that quantum Boolean circuits can be arranged into a 1-testable quantum iterative logic array (QILA). Furthermore, with superposition, which is a nanoscale phenomenon in the quantum computation, any quantum Boolean circuit and any QILA can be tested in just a few steps for any given classical Boolean function. By utilizing nanotechnology, these methods provide a smooth migration to the next generation circuit design and may intrinsically change the IC design flow in the future. Recently, a systematic procedure was proposed to derive a minimum input quantum circuit for any given classical logic with the generalized quantum Toffoli gate, which is universal in Boolean logic. Since quantum Boolean circuits are reversible, we can apply this property to build quantum iterative logic array (QILA). QILA can be easily tested in constant time (C-testable) if stuck-at fault model is assumed. In this project, we try to use Hadamard and general CCN gates to make QILA 1-testable. That is, for any quantum Boolean circuit, the number of test patterns is independent of both the size of the array and the length of the inputs. Nanotechnology has made the semiconductor industry to keep up with the growth of consumers'' performance--capacity demands. Sophisticated semiconductor fabrication techniques are used for the production of nanoscale structures. By nanometer technologies, there are more transistors fabricated on a single chip with increasing integration scale, thus reducing the cost per transistor. However, nanometer-scale devices have much higher manufacturing fault rates and are more sensitive to failures of transistors and wires owing to many external factors. Consequently, the difficulty of testing each transistor increases as the complexity of devices increases. Testing such highly complex and dense circuits becomes very difficult and expensive. On the other hand, when devices are getting smaller and smaller, the quantum effect appears. With nanoscale phenomenon such as superposition or entanglement, we can perform quantum computation to accomplish some tasks that are classically impossible. Some of these examples are Shor''s factorization and Grover''s search algorithm. It is interesting to note that these nano-phenomena can be used to solve the circuit testing problem as well. Previous study showed that any classical circuit can be implemented by a straightforward replacement algorithm with auxiliary qubits as intermediate storage. Recently, a construction procedure of minimum input quantum Boolean circuit was proposed. The constructed quantum Boolean circuits are reversible. Such circuits are of interest for several reasons. One of the important reasons is energy saving. Reversible circuits are information lossless and hence tend to dissipate relatively little energy. According to Landauer''s principle, it is possible to construct a computer using reversible circuits that can compute with arbitrarily small amounts of energy. Another reversible circuit''s property of particular interest is that the Boolean function of a reversible circuit is bijective (one-to-one and onto); hence it can be used to form an iterative logic array (ILA), a system that consists of identical modules arranged in a geometrically regular interconnection pattern. ILA is well known to be easily testable. In this project, we study the testing properties on quantum Boolean circuit and quantum iterative logic array (QILA). QILA consists of reversible quantum circuits constructed from a library of universal reversible gates, including quantum NOT, controlled-NOT (CNOT), generalized controlled-controlled-NOT (CCN), and Hadamard gates. Under stuck-at fault and cell fault model, we show that any QILA and quantum Boolean circuits are 1-testable. That is, the circuits can be tested with only one test pattern. 郭斯彥 2009 學位論文 ; thesis 61 en_US