Process Study of High-k Gate Stack Dielectrics and Interfacial layer for MOS Devices

Process Study of High-k Gate Stack Dielectrics and Interfacial layer for MOS Devices

碩士 === 國立清華大學 === 工程與系統科學系 === 97 ===

Bibliographic Details
Main Authors:	Wu, Dong-Yi, 吳東益
Other Authors:	Chang-Liao, Kuei-Shu
Format:	Others
Language:	zh-TW
Published:	2009
Online Access:	http://ndltd.ncl.edu.tw/handle/15838352185363723747

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