Process Study of High-k Gate Stack Dielectrics and Interfacial layer for MOS Devices

碩士 === 國立清華大學 === 工程與系統科學系 === 97 ===

Bibliographic Details
Main Authors:	Wu, Dong-Yi, 吳東益
Other Authors:	Chang-Liao, Kuei-Shu
Format:	Others
Language:	zh-TW
Published:	2009
Online Access:	http://ndltd.ncl.edu.tw/handle/15838352185363723747

id	ndltd-TW-097NTHU5593048
record_format	oai_dc
spelling	ndltd-TW-097NTHU55930482015-10-13T12:09:18Z http://ndltd.ncl.edu.tw/handle/15838352185363723747 Process Study of High-k Gate Stack Dielectrics and Interfacial layer for MOS Devices 金氧半元件中堆疊式高介電層與界面層之製程研究 Wu, Dong-Yi 吳東益碩士國立清華大學工程與系統科學系 97 Chang-Liao, Kuei-Shu 張廖貴術 2009 學位論文 ; thesis 104 zh-TW
collection	NDLTD
language	zh-TW
format	Others
sources	NDLTD
description	碩士 === 國立清華大學 === 工程與系統科學系 === 97 ===
author2	Chang-Liao, Kuei-Shu
author_facet	Chang-Liao, Kuei-Shu Wu, Dong-Yi 吳東益
author	Wu, Dong-Yi 吳東益
spellingShingle	Wu, Dong-Yi 吳東益 Process Study of High-k Gate Stack Dielectrics and Interfacial layer for MOS Devices
author_sort	Wu, Dong-Yi
title	Process Study of High-k Gate Stack Dielectrics and Interfacial layer for MOS Devices
title_short	Process Study of High-k Gate Stack Dielectrics and Interfacial layer for MOS Devices
title_full	Process Study of High-k Gate Stack Dielectrics and Interfacial layer for MOS Devices
title_fullStr	Process Study of High-k Gate Stack Dielectrics and Interfacial layer for MOS Devices
title_full_unstemmed	Process Study of High-k Gate Stack Dielectrics and Interfacial layer for MOS Devices
title_sort	process study of high-k gate stack dielectrics and interfacial layer for mos devices
publishDate	2009
url	http://ndltd.ncl.edu.tw/handle/15838352185363723747
work_keys_str_mv	AT wudongyi processstudyofhighkgatestackdielectricsandinterfaciallayerformosdevices AT wúdōngyì processstudyofhighkgatestackdielectricsandinterfaciallayerformosdevices AT wudongyi jīnyǎngbànyuánjiànzhōngduīdiéshìgāojièdiàncéngyǔjièmiàncéngzhīzhìchéngyánjiū AT wúdōngyì jīnyǎngbànyuánjiànzhōngduīdiéshìgāojièdiàncéngyǔjièmiàncéngzhīzhìchéngyánjiū
_version_	1716854178150612992

Process Study of High-k Gate Stack Dielectrics and Interfacial layer for MOS Devices

Similar Items