A multi-mode decoder architecture for RS-LDPC codes
碩士 === 國立清華大學 === 電機工程學系 === 97 === For an efficient multi-mode low-density parity-check (LDPC) decoder, most hardware resources, such as permutators, should be shared among different modes. Although an LDPC code constructed based on a Reed-Solomon (RS) code with two information symbols is not quasi...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/71053854055080951654 |