Mixed-Voltage-Tolerant I/O Cell With Dynamic Biasing and Sub 3×VDD Wide Range Mixed-Voltage-Tolerant I/O Cell
碩士 === 國立中山大學 === 電機工程學系研究所 === 97 === The thesis is composed of tow topics: a fully bidirectional mixed- voltage-tolerant I/O cell using a new output stage circuit and a sub-3×VDD wide range fully bidirectional mixed-voltage-tolerant I/O cell. The first topic discloses a mixed-voltage-tolerant I/O...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2009
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/aqfnzf |