Script-Controlled Constrained-Random Pattern Generator for Processor Verification
碩士 === 國立交通大學 === 電子工程系所 === 97 === IC complexity is increasing so rapidly that the time spent on whole design flow increases in this situation. It is necessary to reduce the development time due to the pressure from the time to market. Verification presents about 60-70% of the total design effort a...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/91148451249666852058 |