Optimal Design of Fatigue Life for Stacked Die Quad FlatNo Lead Package by Using Response Surface Method andGenetic Algorithm
碩士 === 國立成功大學 === 工程科學系碩博士班 === 97 === With the characters of light-weight, mini-size, low costs, and excellent electrical and thermal performances, the traditional low pin-count IC has been replaced by QFN IC in recent years. Furthermore, the 3D packaging technology facilitated to above purposes ha...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/30930821773463820924 |