A 6-bit 2-GSamples/s Binary-Weighted Current-Steering D/A Converter
碩士 === 國立中興大學 === 電機工程學系所 === 97 === This paper presents the design for a 6-bit very high-speed, low-power Digital-to-Analog Converter (DAC) applied to a OFDM system. The DAC is constructed on the binary weighted current cell structure, and thus bypasses the thermometer decode design, which allows t...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/74044503681557378029 |